2026 IEEE International Symposium on Circuits and Systems
Topic: Efficient FPGA Deployment of Power-of-Two Quantized Networks via Dynamic Hierarchical Base-Exponent Offset Encoding
About
Sean Longyu Ma is a Lecturer in the School of Computer Science at the
University of Auckland. His research focuses on FPGA-based computing,
RISC-V customisation, high-level synthesis, and heterogeneous computing.
Education
PhD in Computer Science
The University of Auckland
Master of Integrated Circuit Engineering
Shanghai Jiao Tong University
Bachelor of Communication Engineering
Harbin Engineering University
Research Interests
FPGA acceleration
RISC-V customisation
High-level synthesis
Heterogeneous computing
Research Interests
I design reconfigurable and customised computing systems that translate
ambitious algorithms into efficient hardware. My current work spans FPGA
acceleration, RISC-V processor customisation, high-level synthesis, and
heterogeneous computing.
Selected Publications
Efficient FPGA Deployment of Power-of-Two Quantized Networks via Dynamic Hierarchical Base-Exponent Offset Encoding.
2026 IEEE International Symposium on Circuits and Systems (ISCAS), 4108-4112,2026.
Adaptive Gradual Quantization with a Custom RISC-V SIMD Accelerator.
2025 IEEE 18th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC),2025.
Enhancing Synthesis Efficiency in HLS through LLM-Based Automated Code Correction.
2025 IEEE 14th Global Conference on Consumer Electronics (GCCE),2025.
LHA: Layer-wise Hardware Acceleration of Progressive Quantizing Inference through Partial Reconfiguration for Edge Computing.
2025 International Joint Conference on Neural Networks (IJCNN),2025.
Recent Updates
Technical Talks of IEEE Consumer Technoligy Society - 19th Webinar
Topic: Beyond the CPU: Dynamic Hardware & Efficient AI for the Next Generation of Mobile
IEEE CASS Workshop: Circuit-Level Intelligence: From Secure Silicon to AI-Ready Systems
Topic: Competing with Giants: A Research Roadmap for Efficient AI on FPGA and RISC-V
A Review of FPGA-Driven LLM Acceleration
This paper provides a brief review of FPGA-based acceleration strategies for large language models (LLMs). As LLMs continue to increase in scale and complexity, efficiently …
yulin-fu
Adaptive Gradual Quantization with a Custom RISC-V SIMD Accelerator
Neural network quantization is essential for deploying deep learning models on resource-constrained devices, but it presents a critical trade-off: aggressive, low-bit quantization …
zongcheng-yue
Prospective Students
I welcome enquiries from prospective PhD and research master’s students
with strong interests in FPGA/GPU systems, circuits and systems, machine
learning acceleration, RISC-V, or cross-disciplinary hardware research.
Please include your CV, academic transcript, and a short description of
your research interests when contacting me.