Dr Sean Longyu Ma

2026 IEEE International Symposium on Circuits and Systems

Wed, 27 May 2026 00:00:00 +0000

Efficient FPGA Deployment of Power-of-Two Quantized Networks via Dynamic Hierarchical Base-Exponent Offset Encoding

Sun, 24 May 2026 00:00:00 +0000

Technical Talks of IEEE Consumer Technoligy Society - 19th Webinar

Fri, 23 Jan 2026 00:00:00 +0000

IEEE CASS Workshop: Circuit-Level Intelligence: From Secure Silicon to AI-Ready Systems

Thu, 18 Dec 2025 00:00:00 +0000

A Review of FPGA-Driven LLM Acceleration

Mon, 15 Dec 2025 00:00:00 +0000

Adaptive Gradual Quantization with a Custom RISC-V SIMD Accelerator

Mon, 15 Dec 2025 00:00:00 +0000

Visually meaningful asymmetric image encryption based on a random devil's vortex phase mask in the gyrator transform domain

Sat, 01 Nov 2025 00:00:00 +0000

Enhancing Synthesis Efficiency in HLS through LLM-Based Automated Code Correction

Tue, 23 Sep 2025 00:00:00 +0000

FPGA-based real-time image tampering detection system for edge computing

Tue, 23 Sep 2025 00:00:00 +0000

Interal Talk with staff in Computer Science, UoA

Fri, 08 Aug 2025 00:00:00 +0000

LightFSA: A Lightweight Financial Sentiment Analysis Model

Thu, 17 Jul 2025 00:00:00 +0000

A Novel Computing Paradigm for MobileNetV3 using Memristor

Mon, 30 Jun 2025 00:00:00 +0000

Joint Post-Training Pruning and Power-of-Two Quantization for Efficient Edge Computing

Mon, 30 Jun 2025 00:00:00 +0000

LHA: Layer-wise Hardware Acceleration of Progressive Quantizing Inference through Partial Reconfiguration for Edge Computing

Mon, 30 Jun 2025 00:00:00 +0000

Target Tracking in Underwater Multi-Sensor Systems using Delayed Bearing-Only Measurements

Mon, 09 Jun 2025 00:00:00 +0000

KernelVM: Teaching Linux Kernel Programming through a Browser-Based Virtual Machine

Wed, 12 Feb 2025 00:00:00 +0000

Journey to the “South”: Advancing Computing from Traditional Architectures to Emerging Technologies

Fri, 08 Nov 2024 00:00:00 +0000

A Framework for Mapping Convolutional Neural Network onto Memristor Crossbars

Tue, 29 Oct 2024 00:00:00 +0000

A Mobile Computing-Friendly Stock Price Trend Prediction Model

Tue, 29 Oct 2024 00:00:00 +0000

An Edge AI System Based on FPGA Platform for Railway Fault Detection

Tue, 29 Oct 2024 00:00:00 +0000

MTST: A Multi-Task Scheduling Transformer Accelerator for Edge Computing

Tue, 29 Oct 2024 00:00:00 +0000

Joint 6G-PHYSEC & INTERACT Workshop on 6G Technologies and PHY Layer Security

Mon, 17 Jun 2024 00:00:00 +0000

WebVM - an innovative approach to teaching OS concepts

Fri, 14 Jun 2024 00:00:00 +0000

ViT-LOB: Efficient Vision Transformer for StockPrice Trend Prediction Using Limit Order Books

Thu, 13 Jun 2024 00:00:00 +0000

PQDE: Comprehensive Progressive Quantization with Discretization Error for Ultra-Low Bitrate MobileNet towards Low-Resolution Imagery

Mon, 22 Apr 2024 00:00:00 +0000

Urban Aquatic Scene Expansion for Semantic Segmentation in Cityscapes

Fri, 22 Mar 2024 00:00:00 +0000

Early-Stopped Technique for BCH Decoding Algorithm Under Tolerant Fault Probability

Mon, 19 Feb 2024 00:00:00 +0000

Joint Source-Channel Coding System for 6G Communication: Design, Prototype and Future Directions

Tue, 30 Jan 2024 00:00:00 +0000

Experience

Tue, 24 Oct 2023 00:00:00 +0000

UoA Postgraduate Supervision experience

Mon, 21 Aug 2023 00:00:00 +0000

Doctor of Philosophy in Computer Science

Xu Chen (2025- Now)

Research on Neural Network Circuit and Computing-in-Memory Accelerator Based on Memristor

Jiale Li (2023- Now)

The Computer Architecture for Edge Artificial Intelligence

Zhihang Liu (2023- Now)

Hardware Acceleration of Deep-learning Algorithm on FPGA for Edge Device

Zongcheng Yue (2022- Now)

Computational Architecture for Intelligent Edge Computing

Yulin Fu (2025–Present)

Optimizing Large Language Models for Edge Devices: A Hardware-Software Co-Design Approach on FPGA

Tingjiang Tan (2026–Present)

Hardware/Software Co-Design for FPGA-Based AI Acceleration

Brian Zhong (2019- 2025, Graduated)

A Comprehensive Study on RISC-V’s Applications to AIoT Endpoint SoCs

Master of Science (Research)

Taojingnan Wang (2025–2026, Graduated)

Ziyuan Zhang (2025–2026, Graduated)

Chenge Gao (2025–2026, Graduated)

Cheng Cheng (2025–2026, Graduated)

Yulin Fu (2024- 2025, Graduated)

FPGA-Adapted Neural Network Models for Low-Latency, High-Accuracy Image recognition: An Integrated Approach

Dongwei Yan (2024- 2025, Graduated)

Effective Progressive Quantization: Enhancing Residual Neural Networks with Ultra-Low Precision Validation on ResNet18 and ResNet50

Master of Information and Technology (Internship)

Han(Olivia) Li (2023-2024)

Roshan Shaheen (2023-2024)

Rupak Lingwal (2023-2024)

UoA Undergraduate Teaching experience

Mon, 21 Aug 2023 00:00:00 +0000

COMPSCI 110 Introduction to Computer Systems (2024S2)

COMPSCI 315 Data Communications Technologies (2024S2)

COMPSCI 215 Data Communication (2024S1)

SOFTENG 370 Operating System (2024S1)

COMPSCI 340 Operating System (2023S2)

Implementation for JSCC Scheme Based on QC-LDPC Codes

Tue, 18 Oct 2022 00:00:00 +0000

An effective multi-mode iris authentication system on a microprocessor-FPGA heterogeneous platform with QC-LDPC codes

Wed, 08 Dec 2021 00:00:00 +0000

A dynamically reconfigurable QC-LDPC implementation for iris recognition

Tue, 12 Oct 2021 00:00:00 +0000

A highly integrated RISC-V based SoC for on-board unit in ETC system

Tue, 12 Oct 2021 00:00:00 +0000

CNN Accelerator with Non-Blocking Network Design

Tue, 12 Oct 2021 00:00:00 +0000

A RISC-V SoC for mobile payment based on visible light communication

Tue, 08 Dec 2020 00:00:00 +0000

An iris recognition system implementation with error correction capability by reusing WiFi standard LDPC codes

Tue, 13 Oct 2020 00:00:00 +0000

A Novel Iris Verification Framework Using Machine Learning algorithm on Embedded Systems

Sat, 03 Oct 2020 00:00:00 +0000

Iris recognition system implementation improved by QC-LDPC codes

Tue, 10 Mar 2020 00:00:00 +0000

SoC-FPGA-based implementation of iris recognition enhanced by QC-LDPC codes

Mon, 09 Dec 2019 00:00:00 +0000

A real-time flexible telecommunication decoding architecture using FPGA partial reconfiguration

Tue, 19 Nov 2019 00:00:00 +0000

A novel data packing technique for QC-LDPC decoder architecture applied to NAND flash controller

Tue, 15 Oct 2019 00:00:00 +0000

Optimized layer architecture for layered LDPC code decoder

Thu, 18 Oct 2018 00:00:00 +0000