Enhancing Synthesis Efficiency in HLS through LLM-Based Automated Code Correction

September 23, 2025·
Ziyuan Zhang
,
Yulin Fu
,
Jiale Li
Dr Sean Longyu Ma
Dr Sean Longyu Ma
,
Chiu-Wing Sham
· 0 min read
Abstract
The integration of AI-based deep learning and advanced signal processing technologies has become crucial in intelligent edge computing systems. In these applications, HLS accelerates the implementation of deep learning accelerators and signal processing modules by converting C/C++ code into RTL hardware. However, HLS imposes unique circuit behavior constraints that frequently lead to synthesis failures, challenging both software and hardware developers. To address this, we propose a fine-tuning framework using LLMs for automated HLS code correction. We create a dataset from Vitis HLS synthesis feedback and apply LoRA-based fine-tuning to LLaMA-3.1-8B. Experimental results demonstrate that the fine-tuned model improves error detection accuracy by 9.7% and enhances correction applicability by 12.9% over the baseline model. Furthermore, GEOMean run-time evaluation on a synthetic benchmark illustrates a performance improvement of 3%, indicating a substantial enhancement in HLS workflows.
Type
Publication
2025 IEEE 14th Global Conference on Consumer Electronics (GCCE)
publications
Dr Sean Longyu Ma
Authors
Lecturer in Computer Science
Sean Longyu Ma is a Lecturer in the School of Computer Science at the University of Auckland. His research focuses on FPGA-based computing, RISC-V customisation, high-level synthesis, and heterogeneous computing.