Enhancing Synthesis Efficiency in HLS through LLM-Based Automated Code Correction

The integration of AI-based deep learning and advanced signal processing technologies has become crucial in intelligent edge computing systems. In these applications, HLS accelerates the implementation of deep learning accelerators and signal processing modules by converting C/C++ code into RTL hardware. However, HLS imposes unique circuit behavior constraints that frequently lead to synthesis failures, challenging both software and hardware developers. To address this, we propose a fine-tuning framework using LLMs for automated HLS code correction. We create a dataset from Vitis HLS synthesis feedback and apply LoRA-based fine-tuning to LLaMA-3.1-8B. Experimental results demonstrate that the fine-tuned model improves error detection accuracy by 9.7% and enhances correction applicability by 12.9% over the baseline model. Furthermore, GEOMean run-time evaluation on a synthetic benchmark illustrates a performance improvement of 3%, indicating a substantial enhancement in HLS workflows. Recommended citation:

@INPROCEEDINGS{11274689, author={Zhang, Ziyuan and Fu, Yulin and Li, Jiale and Ma, Sean Longyu and Sham, Chiu-Wing}, booktitle={2025 IEEE 14th Global Conference on Consumer Electronics (GCCE)}, title={Enhancing Synthesis Efficiency in HLS through LLM-Based Automated Code Correction}, year={2025}, volume={}, number={}, pages={382-384}, keywords={Deep learning;Codes;Accuracy;Large language models;Computational modeling;Signal processing;Software;Hardware acceleration;Consumer electronics;Edge computing;HLS;LLMs;Edge Computing;LoRA}, doi={10.1109/GCCE65946.2025.11274689}}